Series, Parallel, Delta & Wye Resistive Reductions

Resistive reduction removes internal nodes while preserving terminal behavior. Series and parallel rules are local; delta-wye conversion handles three-terminal resistor networks that contain neither pattern.

An equivalent resistor network must preserve the voltage-current relation seen at its exposed terminals. Reduction is therefore an elimination operation: internal node voltages and branch currents disappear, but no external experiment can distinguish the reduced network from the original over the modeled range.

Series and parallel tests #

Two resistors are in series only when their shared node has no third connection, forcing the same current through both:

Rs=R1+R2.R_s=R_1+R_2.

They are in parallel only when both ends connect to the same two nodes, forcing the same voltage across both:

1Rp=1R1+1R2,Rp=R1R2R1+R2.\frac{1}{R_p}=\frac{1}{R_1}+\frac{1}{R_2},\qquad R_p=\frac{R_1R_2}{R_1+R_2}.

Visual alignment on a schematic proves neither condition. Node identity does.

Delta to wye #

For a delta with edge resistances RabR_{ab}, RbcR_{bc}, and RcaR_{ca}, let S=Rab+Rbc+RcaS=R_{ab}+R_{bc}+R_{ca}. The equivalent wye arms are

Ra=RabRcaS,Rb=RabRbcS,Rc=RbcRcaS.R_a=\frac{R_{ab}R_{ca}}{S},\quad R_b=\frac{R_{ab}R_{bc}}{S},\quad R_c=\frac{R_{bc}R_{ca}}{S}.

For the reverse conversion, with wye arms Ra,Rb,RcR_a,R_b,R_c and P=RaRb+RbRc+RcRaP=R_aR_b+R_bR_c+R_cR_a:

Rab=PRc,Rbc=PRa,Rca=PRb.R_{ab}=\frac{P}{R_c},\quad R_{bc}=\frac{P}{R_a},\quad R_{ca}=\frac{P}{R_b}.

The formulas preserve resistance between each pair of external terminals with the third terminal left open.

Reduction strategy #

  1. label nodes before looking for patterns;
  2. reduce unambiguous series/parallel groups;
  3. use delta-wye only when it exposes a new reduction;
  4. stop when reduction would hide a requested internal current or voltage;
  5. use nodal or mesh analysis when algebraic reduction grows rather than shrinks.

The open-third-terminal check is necessary but not sufficient by itself; repeat it for all three terminal pairs. Equality of those three pairwise resistances establishes the three-terminal equivalence for a passive resistive network.

Sources

  1. docs6.01SC Course Notes: Chapter 6, Circuitspdf

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