Performance Engineering
Measuring, modeling, and optimizing the latency and throughput of production systems from CPU microarchitecture up to capacity planning.
Measurement & Methodology
- Performance Methodology: USE & RED planned target working top
- Profiling with perf & Flamegraphs planned target deep top
- Benchmarking Pitfalls & Statistics planned target deep high
- Latency Percentiles & Coordinated Omission planned target deep top
CPU & Microarchitecture
- CPU Caches & the Memory Hierarchy planned target deep top
- Branch Prediction & Instruction Pipelines planned target working mid
- SIMD & Vectorization planned target overview low
- NUMA & Memory Locality planned target working high
- Reading Disassembly & x86-64 Instruction Encoding planned target working high
- Calling Conventions & the System V ABI planned target working high
- Floating-Point on Modern Hardware (SSE2, FMA, denormals) planned target working mid
Memory & Allocation
- Memory Allocators (malloc, jemalloc, tcmalloc) planned target working high
- GC vs Manual Memory Management planned target working mid
- Zero-Copy Techniques planned target working high
Low-Latency Engineering
- Mechanical Sympathy & Data-Oriented Design planned target working high
- Tail Latency & Jitter Sources planned target deep high
Capacity & Modeling
- Queueing Theory in Practice planned target working mid
- Capacity Planning planned target working mid
- Load Testing & Workload Modeling planned target working mid