Microcontroller Integrated Analog, ADC & Comparator

The integrated ADC chapter of a microcontroller manual is not just a resolution number. It describes an analog path from package pin through mux and sample network to a converter referenced against a voltage, plus a digital path that starts, times, stores, flags, and transfers each result.

Ideal code and its limits #

For an ideal unipolar N-bit ADC spanning approximately 0 to V_REF, the code scale is roughly

[ LSB=\frac{V_{REF}}{2^N}, \qquad code\approx \left\lfloor\frac{V_{IN}}{V_{REF}}2^N\right\rfloor, ]

with endpoint behavior defined by the actual converter. This equation explains scaling; it does not include offset, gain error, nonlinearity, reference error, noise, input leakage, or insufficient settling.

Acquisition is an RC event #

Many MCU SAR ADCs connect the selected input to an internal sample capacitor for a finite acquisition interval. The external source resistance, mux resistance, capacitance, and acquisition time determine settling. A high-impedance sensor can produce a low or channel-history-dependent code even when a multimeter reads the correct DC voltage.

For first-order settling, the residual error after time t is proportional to e^{-t/(RC)}. Higher resolution requires a smaller fraction of an LSB, so it demands more time constants. Remedies include longer acquisition, lower source impedance, a buffer amplifier, slower ADC clock when it extends acquisition, or discarding a first sample after a large mux change when the manual calls for it.

Reference is the ruler #

The ADC reports a ratio to its reference. Reference noise and drift become code noise and gain error. Internal references need startup time and have tolerance; supply-referenced conversion inherits supply movement; an external reference needs decoupling, drive stability, and a legal pin range.

Measure and filter the reference path as seriously as the input. Separating analog supply/reference decoupling and avoiding large digital-current edges during acquisition can materially improve repeatability.

Conversion lifecycle #

1. enable the analog domain and select a valid ADC clock;
2. select reference and input route;
3. allow required reference and mux settling;
4. start conversion manually or through a trigger;
5. acquisition captures the input and conversion resolves the code;
6. hardware transfers the result and marks completion;
7. software reads bytes in the documented order and preserves channel/timestamp context;
8. completion state is cleared or consumed before the next result overwrites it.

Free-running and triggered modes add queueing questions: what happens when a trigger arrives while busy, when a result is unread, or when software changes channel between trigger and completion?

Result alignment and atomic reads #

An N-bit result may span two 8-bit registers and can be left- or right-adjusted. Devices often latch the pair when one byte is read and release/update it when the other is read. The required order prevents a high byte from one conversion being combined with a low byte from another.

Read the exact device rule. Disabling interrupts is not a substitute when hardware itself updates the pair asynchronously, and it may be unnecessary when the device provides the intended latch.

Analog comparator #

A comparator produces one bit according to which input is higher, possibly with hysteresis, filtering, or selectable internal references. It can request an interrupt, capture a timer, or drive logic without a full ADC conversion.

It is useful for threshold crossing, zero-cross timing, wakeup, and protection, but it does not provide amplitude. Near the threshold, noise can cause chatter unless hysteresis, filtering, and source impedance are designed. Propagation delay and input common-mode limits matter when the comparator triggers a time-critical action.

Calibration and verification #

Separate these errors:

• offset shifts all codes;
• gain error changes span;
• DNL/INL describe code-step and transfer-shape deviation;
• reference error changes the scale;
• noise spreads repeated readings;
• settling error depends on prior channel and source impedance;
• aliasing turns unfiltered out-of-band input into false low-frequency content.

Use a known stable source at several points, record raw repeated codes, test after channel changes, and vary ADC clock/acquisition time. Calibration can correct stable offset and gain; it cannot restore information lost to clipping, aliasing, or inadequate acquisition.