Lead–Lag Compensation & Frequency-Domain Design
Lead compensation adds phase near crossover to increase damping or bandwidth; lag compensation raises low-frequency loop gain relative to crossover to improve accuracy. Their pole-zero placement is a controlled redistribution of gain and phase, constrained by delay, nonminimum-phase dynamics, noise, uncertainty, and actuator effort.
Frequency-domain design asks what loop shape makes each causal path acceptable: high gain where tracking and disturbance rejection matter, a robust crossover with sufficient phase, and low gain where noise and unmodeled dynamics dominate. Lead and lag networks are elementary ways to redistribute that gain and phase.
Lead creates a phase bump between its zero and pole. Lag changes low-frequency gain relative to crossover but contributes negative phase in its transition band.
Lead network #
A common form is
The zero is at and the pole farther left at . Maximum phase lead is
at
At , the network magnitude relative to its low-frequency gain is . A lead network therefore changes both phase and gain; crossover will move unless is adjusted.
Lead is useful to increase phase margin, move dominant poles left, or raise bandwidth. The costs are higher high-frequency gain, more measurement-noise/control activity, and increased exposure to unmodeled fast modes.
Worked lead design #
Suppose the uncompensated loop needs about additional phase near desired crossover . Choose
Center the phase bump at crossover:
Thus the zero is near rad/s and pole near rad/s. The compensator magnitude at 4 rad/s is (5.65 dB), so choose from the full loop magnitude condition, not from phase alone.
After design, recompute actual crossover and phase margin. Iteration is expected because the compensator moves the crossover that defined its placement.
Lag network #
One convenient DC-normalized form is
Its pole lies closer to the origin than its zero . High-frequency magnitude is lower than low-frequency magnitude by . If is then scaled to preserve crossover magnitude, low-frequency loop gain increases by approximately , reducing steady error.
The pole-zero pair should normally lie well below crossover so its negative phase at crossover is small. Putting it too close adds phase lag, reduces margin, and introduces a slow mode that can lengthen settling even while the low-frequency error improves.
Lead–lag is not automatic cancellation #
Lead and lag factors may be placed near plant poles or zeros, but exact cancellation is rarely the objective. Cancelling uncertain slow poles can produce a hidden tail; cancelling an unstable pole or right-half-plane zero is unacceptable for internal stability. Design the combined loop shape under parameter variation, not a single nominal algebraic simplification.
Frequency-domain design sequence #
- Write performance as frequency requirements on , , disturbance paths, noise paths, and control effort.
- Plot the plant with delay and uncertainty, not only a nominal rational fit.
- Choose a plausible crossover below nonminimum-phase zeros, significant delay limits, and unmodeled resonances.
- Set low-frequency gain/integral structure for tracking and disturbance requirements.
- Add lead if the phase near crossover is insufficient.
- Add lag only when low-frequency gain must rise without a comparable crossover increase.
- Add roll-off or notches for justified high-frequency dynamics, checking robustness of every near cancellation.
- Recompute Nyquist, margins, sensitivity peaks, time response, and control effort over uncertainty.
Desired Bode shapes and slope #
A crossover slope near dB/decade often supports a single, well-behaved crossover and usable phase margin, but it is a heuristic, not a theorem. Multiple integrators, resonances, delays, and right-half-plane zeros can make that shape unattainable or misleading.
The desired loop is constrained by plant inversion. A controller formed as is realizable only if it is stable, proper, causal, and robust to plant uncertainty. Exact inversion of delay, unstable zeros, or uncertain high-frequency dynamics violates those conditions.
Time-domain and implementation closure #
A Bode design is incomplete until it passes:
- reference and disturbance transients;
- actuator magnitude/rate and saturation tests;
- measurement-noise and quantization tests;
- delay and sample-rate verification;
- gain scheduling or operating-point sweeps;
- initialization and manual/automatic transfer.
Lead and lag are not labels for “faster” and “more accurate.” They are precise pole-zero mechanisms that trade phase, gain distribution, bandwidth, noise, and slow dynamics.
Sources
- bookTheory of Automatic Control: Lecture Notespdfnotes
- bookFeedback Systems: An Introduction for Scientists and Engineers, 2nd Editionpdfnotes
- docsMIT OCW 6.302 Recitations 14–17: Bode Design and Compensation
- docsMathWorks: Edit Compensator Dynamics