Receiver Architectures: Superheterodyne & Direct Conversion

A radio receiver has to recover a small occupied band while the antenna delivers every signal that the front end can pass, including blockers many orders of magnitude stronger than the wanted signal. The architecture is the decision about where to translate frequency, where to reject unwanted energy, where to place gain, and when to digitize. It does not change the modulation; it changes which imperfections are hardest to control.

Superheterodyne, zero-IF, low-IF, and direct-RF-sampling receivers are therefore not a historical sequence from obsolete to modern. They are different allocations of the same jobs. A narrowband high-dynamic-range radio may still need analog IF filters, while a wideband software-defined radio may accept a broad spectrum into a fast ADC and perform channel selection digitally. In both cases, anything that compresses or aliases before the digital boundary is irreversible.

Start from requirements, not a block diagram #

A receiver specification is a set of simultaneous inequalities:

• sensitivity: the wanted signal must clear the input-referred noise floor by the demodulator's required SNR;
• blocking and selectivity: specified off-channel signals must not compress the front end, create in-band intermodulation, or consume the converter's range;
• frequency coverage and instantaneous bandwidth: the tuning range may span octaves while the useful channel occupies only kilohertz, or one capture may need hundreds of megahertz;
• fidelity: gain ripple, group delay, phase noise, DC/IQ errors, and spurs must stay inside the allowed EVM or analog distortion budget;
• acquisition and settling: LO tuning, filters, AGC, DC correction, and digital loops must settle before useful payload begins;
• power, size, cost, and calibration: filters and oscillators buy analog performance; ADC rate and DSP buy flexibility, but neither is free.

At the standard noise temperature $T_0=290\,\text{K}$, the familiar first sensitivity estimate is

$$P_{\min}\,[\text{dBm}]\approx -174 + 10\log_{10}B + NF + SNR_{\min},$$

where $B$ is the receiver noise bandwidth in hertz, $NF$ is the cascaded receiver noise figure in decibels, and $SNR_{\min}$ is the post-detection requirement. It is only a starting point: a receiver that meets this number with no blocker can still fail completely when a nearby transmitter is present.

The common cascade and what each block owns #

flowchart LR
  A[antenna] --> P[preselector]
  P --> L[LNA or RF gain]
  L --> M[mixer and LO]
  M --> I[IF or baseband filter]
  I --> V[VGA and AGC]
  V --> C[ADC]
  C --> D[DDC, channelizer, demodulator]

The physical implementation may combine blocks, repeat them, or omit the analog mixer, but the responsibilities remain:

AGC is a control system around this cascade, not a magic gain block. Its detector location, attack/release law, gain-step transients, and overload indicators define what it protects. During bring-up, first set gains manually and prove every node's headroom; only then close the loop.

Superheterodyne: move every station to one good filter #

An ideal multiplier produces sum and difference frequencies. A superheterodyne receiver chooses a nonzero intermediate frequency (IF):

$$f_{IF}=|f_{RF}-f_{LO}|.$$

Tuning the LO makes every selected RF channel land on the same fixed IF filter, amplifier, and detector. That is the architecture's enduring advantage: a high-performance fixed filter is easier to build than an equally selective filter that must tune across the whole RF band.

The image is the other solution of the same equation #

The absolute value hides an ambiguity. Frequencies equally far above and below the LO produce the same IF. If the wanted signal is on one side, the image frequency is on the other:

$$f_{RF}=f_{LO}\pm f_{IF}, \qquad |f_{image}-f_{wanted}|=2f_{IF}.$$

This produces the classic IF trade:

• a high first IF separates wanted and image widely enough for a practical RF preselector, but demands faster IF components and leaves channel filtering difficult;
• a low final IF makes narrow, stable channel filters and ADCs practical, but places its image close to the wanted RF;
• dual conversion uses both: first translate to a high IF for image rejection, filter, then translate to a low IF for selectivity and digitization.

Real frequency planning also enumerates LO feedthrough, the undesired mixer sum, harmonics, and products $m f_{RF}\pm n f_{LO}$. Choosing an IF because one desired difference works is not a frequency plan; every plausible strong input must be checked for a product that lands in the passband.

Direct conversion: put the channel at complex DC #

A direct-conversion, homodyne, or zero-IF receiver sets $f_{LO}=f_{RF}$ and uses quadrature mixers to produce complex baseband $I(t)+jQ(t)$. Channel selectivity becomes a pair of low-pass filters, the classical image separated by $2f_{IF}$ disappears because $f_{IF}=0$, and one translation stage can cover very wide bandwidth with high integration.

That simplicity moves several impairments directly into the wanted signal:

DC offset and LO self-mixing

LO energy leaks toward the RF input or through the mixer, reflects or couples back, and mixes with itself to DC. Mixer and baseband offsets add to it. The resulting DC term consumes ADC headroom and can mask signal content near the carrier.

Flicker ($1/f$) noise

Device noise rises toward DC, exactly where zero-IF places the centre of a narrowband channel. Extra RF gain can reduce the input-referred penalty, but that gain costs blocker headroom.

Even-order distortion

Second-order products and blocker self-mixing can fall at or near DC. Differential circuits and calibration reduce them; a low-pass filter cannot distinguish them from wanted near-zero content.

I/Q imbalance

Unequal I/Q gain or a phase error away from 90° prevents perfect separation of positive and negative complex frequencies. A strong signal's conjugate image can then overlap a weak wanted signal.

AC coupling or a digital DC notch removes an offset only by also deleting wanted spectrum near zero. Calibration must therefore track offset, LO leakage, and I/Q mismatch across frequency, gain, temperature, and time rather than assuming one factory constant.

Low-IF: move the channel away from the DC trouble #

A low-IF receiver deliberately offsets the LO so the desired channel appears at a small nonzero positive or negative frequency, then a digital NCO translates it to zero. This keeps wanted energy away from DC offset and much of the flicker-noise region while retaining integrated I/Q conversion and digital channel filtering.

The price is an image only $2f_{IF}$ away. Analog RF filtering may not separate it, so image rejection depends on quadrature balance and complex digital filtering. Increasing the offset improves separation from DC and may move the image into an external filter's attenuation region, but it consumes more ADC bandwidth and can complicate adjacent-channel placement. Modern integrated transceivers therefore expose zero-IF versus offset-IF as an operating choice, not a permanent architectural identity.

Direct RF and bandpass sampling: the ADC becomes the mixer #

In a direct-sampling receiver, the ADC samples RF or a high IF and a digital NCO performs the explicit downconversion. Sampling itself replicates the input spectrum every $f_s$, so a deliberately chosen replica can land in the first Nyquist interval. This is bandpass sampling or undersampling: the sample rate must preserve the occupied bandwidth, while the ADC's analog input bandwidth must still pass the absolute RF frequency.

For a single real-input tone, its first-zone alias is conveniently calculated as

$$f_a=\left|f-\mathop{\mathrm{round}}\!\left(\frac{f}{f_s}\right)f_s\right|, \qquad 0\le f_a\le \frac{f_s}{2}.$$

An alias plan therefore checks the desired band, every Nyquist boundary, converter harmonics and interleaving spurs, clock/reference spurs, and every blocker band passed by the analog front end. $f_s>2B$ is necessary for a band of width $B$ but not sufficient for a usable receiver; the band must fit wholly inside a unique Nyquist zone with enough transition room for the real antialias filter.

Direct RF sampling removes analog mixers and tunable LOs from the signal path, but it transfers their burden to three places:

1. the ADC must have analog bandwidth, noise density, linearity, and full-scale range at the actual RF input frequency;
2. the sample clock's phase noise and aperture jitter are now conversion errors;
3. the preselector must reject every band that would alias onto the wanted samples.

For a full-scale sine limited only by rms sampling uncertainty $\sigma_t$,

$$SNR_{jitter}=-20\log_{10}(2\pi f_{in}\sigma_t).$$

At $f_{in}=1\,\text{GHz}$ and $\sigma_t=100\,\text{fs}$, the ceiling is about 64 dB even for an otherwise perfect ADC. Raising the sample rate does not change that expression; lowering the analog input frequency or improving total clock-plus-aperture jitter does.

Four architectures, one trade space #

The table describes tendencies, not guaranteed performance. A calibrated integrated zero-IF transceiver can outperform a poor superhet, and a direct-sampling receiver still has an analog RF front end. Architecture sets the error mechanisms; component performance and frequency planning set the result.

Cascaded noise figure: why the first loss hurts most #

Noise factors and power gains must be linear in Friis' cascade equation:

$$F_{tot}=F_1+\frac{F_2-1}{G_1} +\frac{F_3-1}{G_1G_2} +\frac{F_4-1}{G_1G_2G_3}+\cdots,$$

with $NF=10\log_{10}F$. For a matched passive loss at 290 K, noise factor equals loss and gain is its reciprocal.

High first-stage gain suppresses the noise contributions of later stages, but it refers their compression limits back toward the antenna. Check both calculations at every gain state. Noise figure alone rewards maximum early gain; blocker headroom does not.

Blockers, dynamic range, and reciprocal mixing #

Receiver dynamic range is not one converter bit count. It is the span between an input-referred noise/error limit and the largest specified signal environment under which the wanted channel still meets its error criterion. Three independent paths can close that span:

• compression: one blocker drives an LNA, mixer, VGA, or ADC out of its linear region;
• intermodulation: two or more blockers create a product inside the wanted band; the P1dB/IP3 mechanisms are treated in signal distortion;
• reciprocal mixing: LO phase fluctuations translate a blocker's energy into the wanted IF/baseband even though neither signal path is compressed.

For a blocker $P_b$ at offset $\Delta f$, a locally flat phase-noise density $\mathcal L(\Delta f)$, and receiver noise bandwidth $B$, the engineering estimate is

$$N_{rm}\,[\text{dBm}]\approx P_b\,[\text{dBm}] +\mathcal L(\Delta f)\,[\text{dBc/Hz}]+10\log_{10}B.$$

With a $-20\,\text{dBm}$ blocker, $\mathcal L=-120\,\text{dBc/Hz}$ at its offset, and $B=200\,\text{kHz}$,

$$N_{rm}\approx-20-120+53.0=-87.0\,\text{dBm}.$$

A 3 dB-NF thermal floor in the same bandwidth is about $-174+53+3=-118\,\text{dBm}$. The blocker has raised the effective floor by roughly 31 dB without requiring a hard overload.

The remedy depends on where the blocker enters. Preselection can remove an out-of-band blocker before it reaches nonlinear devices. More linear stages prevent compression and intermodulation. Lower LO phase noise reduces reciprocal mixing. Later digital filtering helps only if the analog chain and ADC have already preserved the wanted signal.

Where software-defined radio actually begins #

“Software-defined” describes which radio functions are programmable, not the absence of analog engineering. A current receive path still starts with antenna switching or a duplexer, band selection, low-noise gain, and often a variable attenuator. The programmable boundary then falls in one of three places:

1. digitized IF: analog tuning and IF filtering reject most blockers; an ADC plus DDC performs final channelization;
2. integrated zero/low-IF transceiver: quadrature conversion, variable analog filtering/gain, ADCs, DC/IQ correction, and digital decimation share one calibrated device;
3. RF-sampling converter: a wideband ADC captures RF directly and integrated DDCs select one or more digital channels.

Modern examples make the split concrete. The ADRV9001 guide shows external LNA/BPF components ahead of an integrated receive chain and exposes zero-IF versus offset-IF operation, digital mixing, decimation, DC correction, and AGC. TI's ADC32RF55 couples a 3 GS/s RF ADC with multiple on-chip DDCs, but its finite full-power input bandwidth, full-scale range, SNR, SFDR, aperture jitter, and clock requirements remain analog constraints. Moving the boundary changes which blocks are programmable; it never moves preselection after aliasing or gain control after clipping.

A reproducible bring-up and diagnostic workflow #

Do not begin with over-the-air packets and a single BER number. Prove the frequency and level plan with controlled signals, keep AGC open until the fixed chain is understood, and record the reference plane for every measurement.

1. Write the frequency plan. For every tune point list wanted RF, LO, chosen IF, classical image, all bands that alias through the ADC, expected spectral orientation, filter edges, and low-order mixer products. Reject any plan that depends on digital filtering to separate already coincident analog products.
2. Establish the no-signal baseline. Terminate the RF input, record DC in I/Q, integrated noise, spectrum, ADC code histogram, gain state, overload flags, and temperature. Repeat with the antenna port open only as a separate EMI/leakage test; it is not a noise-figure measurement.
3. Inject one low-level wanted tone. Disable AGC, step through gain states, and verify frequency, sign/orientation, gain, and headroom at each accessible node. A wrong IF is a frequency-plan fault, not a demodulator fault.
4. Inject the ambiguity candidates. Test the superhet image, both low-IF sidebands, and each planned RF-sampling alias band one at a time. Measure rejection rather than assuming the filter or I/Q calibration works.
5. Sweep wanted level. Find the noise-limited region, linear gain region, first compression, and ADC clipping. Compare observed breakpoints with the node-level budget.
6. Add blockers. Sweep blocker level and offset with the wanted signal held fixed. A floor that rises approximately 1 dB for each 1 dB blocker increase before compression is evidence consistent with reciprocal mixing; two-tone products that move as $2f_1-f_2$ point to third-order nonlinearity.
7. Characterize zero/low-IF errors. Change LO drive and tuning, swap equal positive/negative offsets, and repeat across gain and temperature. A DC spur that tracks LO conditions suggests self-mixing; unequal mirror responses indicate I/Q imbalance; excess noise concentrated near DC suggests flicker contribution.
8. Close AGC last. Apply the declared burst and blocker envelopes, log detector value, commanded gain, actual gain, clipping flags, and settling. Verify both attack and recovery; a loop can prevent ADC clipping while still losing a weak wanted signal under a blocker.
9. Only then use the real modulation. Record pre-demodulator I/Q, spectrum, EVM/error vectors, and acquisition-loop state. Carrier/timing/frame acquisition belongs to symbol timing and ISI; the architecture test must already have shown that the samples reaching those loops are unaliased and linear.

The decisive habit is to keep frequency, gain, noise, and overload evidence on the same signal path. A receiver “works” only when the wanted band survives the specified blocker environment through every analog node, arrives inside the ADC's valid range without ambiguity, and gives the digital acquisition loops the signal model they were designed to track.