Electrical Safety, Current Capacity & Thermal Design

Voltage spacing, copper width, and temperature are not separate cleanup checks. A conductor heats its surroundings; heat changes material strength, leakage, component lifetime, and protective-device behavior; contamination and altitude change insulation performance; faults redistribute both voltage and current. Safety design must therefore start with energy sources and accessible consequences.

Coordinate insulation from the system boundary #

Identify circuits that are hazardous, accessible, protective-earth referenced, floating, or safety extra-low voltage under the governing product standard. Then determine the required functional, basic, supplementary, double, or reinforced insulation. These are safety functions, not adjectives for a large gap.

Clearance is the shortest distance through air. It is driven by impulse withstand, working voltage waveform, overvoltage category, altitude, and field geometry. Creepage is the shortest distance along an insulating surface. It is driven by working voltage, pollution degree, material tracking group, and surface geometry. Slots can lengthen creepage only when their geometry satisfies the applicable rules.

The IEC 60664-1 consolidated edition covers insulation coordination for low-voltage systems and makes the required inputs explicit. Do not copy a spacing value from another product without matching voltage, altitude, pollution, material, insulation function, and product-specific standard.

Safety boundaries must include pads, vias, copper on all layers, component bodies and leads, mounting hardware, heat sinks, test points, connectors, board edges, contamination paths, and manufacturing tolerance. Isolation components need ratings and certification for the intended working and transient voltages, not merely a package with wide pins.

Current capacity is a temperature-rise problem #

A trace dissipates

$$P=I^2R, \qquad R=\rho\frac{\ell}{wt},$$

where $\rho$ is copper resistivity, $\ell$ length, $w$ width, and $t$ finished thickness. But temperature rise also depends on copper planes, nearby traces, board material, airflow, enclosure, duty cycle, terminals, vias, and heat sources. The IPC design family includes IPC-2152 for current-carrying capacity; it should be used with the actual geometry and allowable temperature rather than as a universal width chart.

At high current, inspect bottlenecks: pad necks, thermal-relief spokes, via arrays, connector contacts, fuse clips, current-sense transitions, and layer changes. Parallel vias do not share current perfectly; spreading and contact resistance matter.

Build a thermal-resistance network #

At steady state, a first estimate is

$$T_j=T_a+P\theta_{JA},$$

but datasheet $\theta_{JA}$ is strongly dependent on the specified test board and environment. A better model separates junction-to-case, package-to-board, spreading through copper and dielectric, interface material, heat sink or enclosure, convection, and radiation.

flowchart TB
  J["Junction heat"] --> P["Package"]
  P --> B["Board copper and vias"]
  P --> C["Case / heat sink"]
  B --> E["Enclosure and air"]
  C --> E
  E --> A["Ambient"]

Transient thermal impedance matters for pulses: short events heat the die before the whole enclosure responds. Repetitive pulses accumulate. Temperature-dependent loss can create positive feedback—for example rising MOSFET resistance increases loss, which raises temperature further.

Thermal vias are effective only when connected to useful spreading copper or a sink; dense small vias can also trap solder under exposed pads. Copper balance, plane cuts, and neighboring heat sources change spreading.

Verify temperatures, not just function #

Use a loss model to find critical parts, then measure production-representative hardware at worst input, load, mode, orientation, ambient, airflow, enclosure, and fault condition. Thermocouples need thin wires, secure attachment, and awareness of heat sinking; infrared measurements need known emissivity and line of sight. Junction temperature may require a calibrated electrical parameter or device telemetry.

Record ambient definition, warm-up, load profile, firmware, unit revision, sensor locations, uncertainty, and steady-state criterion. Verify accessible surfaces, insulation materials, connectors, capacitors, magnetics, semiconductors, and protective devices against their own limits and the product standard.

Fail safely #

Analyze opens, shorts, wrong component values, blocked airflow, stalled loads, reversed or excessive supply, connector mis-mating, sensor loss, and protection failure. Ask which energy source remains, where current flows, what becomes accessible, and whether a single fault defeats more than one claimed protection layer. A board is safe when its architecture contains energy and evidence demonstrates the containment—not when nominal temperatures and spacings look generous.