Inverters: Line-Commutated, Voltage-Source & Current-Source

An inverter is defined by power flow and waveform synthesis, not by one historical circuit. A DC-side source or link supplies energy; switches connect it to an AC load or grid in controlled states; inductance keeps current continuous between states; and the control system chooses switching times to obtain the desired fundamental voltage, current, torque, or grid power.

Three different dependencies #

The storage element dictates the forbidden state. A VSI phase leg must never turn on both devices together; a CSI must never interrupt the only current path.

VSI phase legs and PWM #

A three-phase two-level VSI has three half bridges. Each phase node is connected to DC+ or DC−; eight combinations exist, including six active voltage vectors and two zero vectors. PWM sequences these states so the motor or filter inductance responds mainly to the desired fundamental while switching ripple remains bounded.

Sinusoidal PWM compares references with a carrier. Space-vector PWM reasons directly about available vectors and zero-state allocation. Both must insert dead time between complementary devices. Dead time prevents shoot-through but distorts phase voltage according to current direction and increases diode or reverse-channel conduction.

Current paths continue after a gate changes #

Turning a switch off does not turn phase current off. Current commutates into another transistor channel or antiparallel diode according to current direction and commanded state. During regeneration, motor EMF drives current back into the DC link. The link then needs an accepting battery or grid front end, a braking chopper and resistor, or another declared energy sink.

Modulation and voltage limit #

Increasing modulation raises the fundamental voltage until the linear PWM region ends. Overmodulation approaches six-step operation, increasing low-order harmonics and changing controller behaviour. At low DC-link voltage the requested voltage vector saturates; current regulators must apply anti-windup and the outer speed/torque loop must respect lost voltage headroom.

Protection and measurement #

Measure phase or DC-link current with enough bandwidth and valid sampling windows; measure DC-link voltage for modulation and overvoltage protection; monitor module temperature; and provide fast hardware overcurrent shutdown. Gate-driver undervoltage lockout, desaturation or $V_{DS}$ detection, Miller immunity, dead-time enforcement, and fault reporting protect the switching layer.

After a trip, identify the freewheel state and DC-link trajectory. Abrupt hard turn-off can create destructive overvoltage; soft turn-off spends more semiconductor energy. The correct action depends on the device, bus inductance, motor current, and fault type.

Verification #

Test all vector transitions and current polarities, minimum pulse widths, dead time, bootstrap refresh, zero-speed high torque, field weakening, regeneration, loss of phase, ground fault, sensor saturation, DC-link over/undervoltage, and restart. Probe each gate relative to its own source/emitter with low-inductance technique; a logic PWM trace does not prove the power device switched safely.