Bipolar Junction Transistors

A bipolar junction transistor is not fundamentally a current-controlled resistor. Forward bias injects carriers from emitter into a thin base; most diffuse across without recombining and are swept into the reverse-biased collector junction. Base current mainly replaces carriers lost to recombination, so collector current can be much larger — but the ratio $\beta$ is a variable consequence, not a design constant.

Regions of operation #

In forward active operation,

$$I_C \approx I_S e^{V_{BE}/V_T}, \qquad g_m=\frac{I_C}{V_T}, \qquad r_e\approx\frac{1}{g_m}.$$

The exponential law makes transconductance predictable from collector current; it also makes current extremely sensitive to junction temperature and small voltage changes. $\beta=I_C/I_B$ varies across parts, current, temperature, and collector voltage, so robust bias networks use emitter degeneration and feedback rather than relying on a nominal value.

Terminal configurations #

• Common emitter gives voltage gain and inversion; collector resistance converts current variation into voltage.
• Emitter follower gives near-unity voltage gain, high input impedance, and lower output impedance.
• Common base accepts current at low input impedance, avoids Miller multiplication of collector-base capacitance, and suits wideband stages.

These are connection views of one device, not three transistor types.

The load line chooses the actual point #

For a collector resistor $R_C$ on supply $V_{CC}$,

$$V_{CE}=V_{CC}-I_CR_C.$$

This straight line is the external circuit constraint. Its intersection with the transistor characteristic at the chosen base drive is the operating point. Bias places that point so the signal excursion avoids both cutoff and saturation while leaving thermal and device spread margin.

flowchart LR
  BIAS["bias network"] --> Q["quiescent point Q"]
  DEVICE["device curves<br/>gm, beta, Early effect"] --> Q
  LOAD["supply + load line"] --> Q
  Q --> SWING["available signal swing<br/>before cutoff or saturation"]

Nonideal effects #

Finite output resistance from the Early effect reduces gain. Junction capacitances limit bandwidth; collector-base capacitance is multiplied by gain in an inverting stage (Miller effect). Shot noise and base spreading resistance matter in low-noise design. In saturation, excess stored charge slows turn-off — driving the base harder can make a switch slower.

Power dissipation is $P\approx V_{CE}I_C$, but safe operating area can be stricter than the simple product because of localized heating and second breakdown. Thermal design follows the junction-to-case-to-ambient network, and worst-case gain, leakage, and temperature must be checked together.