Input-Filter Interaction & Converter Stability

An input LC or π filter can meet a conducted-noise target and still make the converter oscillate. The filter is not driving a passive resistor: it drives a regulated power stage whose incremental input impedance depends on its control loop, load, operating point, limits, and frequency. Filter design therefore has two simultaneous obligations—attenuate switching noise and preserve source/filter/converter stability.

Why a regulated load can look like negative resistance #

If a tightly regulated converter draws approximately constant input power $P$, then

$$I_{in}=\frac{P}{V_{in}},\qquad \frac{dI_{in}}{dV_{in}}=-\frac{P}{V_{in}^2}.$$

Its low-frequency incremental input resistance is therefore

$$r_{in}=\left(\frac{dI_{in}}{dV_{in}}\right)^{-1}=-\frac{V_{in}^2}{P}.$$

A small input-voltage fall commands more input current, which causes a larger drop through source/filter impedance: this is positive feedback. The approximation applies only while the converter regulates power. Startup, undervoltage lockout, current limit, dropout, burst mode, and upstream control change the input law.

The impedance minor loop #

Let $Z_{of}(s)$ be the input filter's output impedance looking back toward the source and $Z_{in}(s)$ the converter input impedance at the actual operating point. Their ratio forms a minor-loop quantity,

$$L_m(s)=\frac{Z_{of}(s)}{Z_{in}(s)}.$$

The exact sign and correction factor depend on the port definitions and the transfer function being examined. A robust screening rule is nevertheless clear: keep $|Z_{of}|$ well below the relevant $|Z_{in}|$ throughout the interaction band so the correction factor stays near one. “They do not cross” is weaker than a designed magnitude and phase margin.

This comparison must include:

• upstream source resistance, cable inductance, connector and protection impedance;
• capacitor ESR/ESL, DC-bias derating, temperature, and tolerance;
• inductor DCR, saturation, winding capacitance, and load current;
• converter line/load/mode corners and its closed-loop bandwidth;
• any second converter attached to the same filtered bus.

Why an undamped LC peak is dangerous #

For an ideal filter, $\omega_0=1/\sqrt{LC}$. Low resistance gives high $Q$, so a small current perturbation produces a large input-voltage response near resonance. The converter control loop then reacts to that voltage movement and can reinforce it. Adding more ideal capacitance may move the resonance without reducing its peak; using nominal component values can hide a worst case created by ceramic-capacitor bias loss or an unloaded source.

Damping strategies #

A series-$RC$ damping branch is often attractive because its capacitor prevents DC loss while the resistor absorbs energy around the resonance. Choose the branch from impedance targets, then check resistor RMS/pulse power and capacitor ripple/bias. Do not select it from a generic “one times $C$” recipe without the actual source and converter models.

Design workflow #

1. Define noise and stability bands. Record the required conducted attenuation, switching frequency range, converter loop crossover, and likely filter resonance.
2. Model the source and filter. Include cable/harness, fuse, protection switch, DCR, ESR/ESL, tolerances, bias, and temperature.
3. Obtain converter input impedance. Derive it from the small-signal model or measure it while the converter is biased at each relevant line/load/mode point.
4. Plot the minor loop. Compare magnitude and phase of $Z_{of}/Z_{in}$; design explicit separation, not a nominal non-crossing picture.
5. Add and rate damping. Recompute insertion loss, impedance peak, efficiency, inrush, and component stress.
6. Verify in hardware. Measure filter transfer, converter loop gain, and input impedance or injected input response. Exercise line steps, load steps, startup, shutdown, UVLO chatter, current limit, and hot/cold component corners.

Bench evidence #

Probe both sides of the filter with short ground structures and sufficient common-mode rejection. A stable-looking output voltage does not rule out input ringing or excessive capacitor/inductor stress. Capture source voltage, converter-side input voltage, input current, output voltage, duty/current command, and the protection-state signal on the same time base.

TI's SLUA929A example is useful because it closes the loop from a real oscillating converter, through measured and modeled Bode behavior, to a damped filter and a repeated bench result. That pattern—not its specific component values—is the reusable method.

System-level traps #

• A lab supply with short leads may be stable while a battery harness or aircraft/vehicle bus is not.
• A filter stable with one converter may fail when parallel converters synchronize or beat.
• Precharge and hot-plug circuits change source impedance while their switches transition.
• A converter may cross from constant-power regulation into current limit during a line sag, replacing one impedance model with another.
• Common-mode and differential-mode filters are coupled by layout and parasitic capacitance even when drawn separately.

The acceptance statement should name source configuration, line/load range, converter modes, temperature, component tolerances, impedance margin, measured loop margin, and transient evidence. “The EMI filter passed” is not a stability result.